- Includes ST state-of-the-art patented technology
- Kern: Arm® 32-Bit-Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator) allowing 0-wait state execution from flash memory, frequency up to 168 MHz, memory protection unit, 210 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
- Erinnerungen
- Up to 1 Mbyte of flash memory
- Up to 192+4 Kbytes of SRAM including 64-Kbyte of CCM (core coupled memory) data RAM
- 512 Byte OTP-Speicher
- Flexible static memory controller supporting CompactFlash™, SRAM, PSRAM, NOR and NAND memories
- Parallele LCD-Schnittstelle, 8080/6800-Modi
- Clock, reset, and supply management
- 1.8 V to 3.6 V application supply and I/Os
- POR, PDR, PVD und BOR
- 4-to-26 MHz crystal oscillator
- Internal 16 MHz factory-trimmed RC (1% accuracy)
- 32-kHz-Oszillator für RTC mit Kalibrierung
- Interner 32-kHz-RC mit Kalibrierung
- Low-power operation
- Sleep, Stop, and Standby modes
- VBAT supply for RTC, 20×32-bit backup registers + optional 4 KB backup SRAM
- 3×12-bit, 2.4 MSPS A/D converters: up to 24 channels and 7.2 MSPS in triple interleaved mode
- 2×12-bit D/A converters
- General-purpose DMA: 16-stream DMA controller with FIFOs and burst support
- Up to 17 timers: up to twelve 16-bit and two 32-bit timers up to 168 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
- Debug mode
- Serial wire debug (SWD) & JTAG interfaces
- Cortex-M4 Embedded Trace Macrocell™
- Up to 140 I/O ports with interrupt capability
- Up to 136 fast I/Os up to 84 MHz
- Bis zu 138 5-V-tolerante Ein-/Ausgänge
- Bis zu 15 Kommunikationsschnittstellen
- Up to 3 × I2C-Schnittstellen (SMBus/PMBus)
- Up to 4 USARTs/2 UARTs (10.5 Mbit/s, ISO 7816 interface, LIN, IrDA, modem control)
- Up to 3 SPIs (42 Mbits/s), 2 with muxed full-duplex I2S to achieve audio class accuracy via internal audio PLL or external clock
- 2 × CAN-Schnittstellen (2.0B aktiv)
- SDIO-Schnittstelle
- Erweiterte Konnektivität
- USB 2.0 Full-Speed-Geräte-/Host-/OTG-Controller mit integriertem PHY
- USB 2.0 High-Speed-/Full-Speed-Geräte-/Host-/OTG-Controller mit dediziertem DMA, integriertem Full-Speed-PHY und ULPI
- 10/100-Ethernet-MAC mit dediziertem DMA: unterstützt IEEE 1588v2-Hardware, MII/RMII
- 8- to 14-bit parallel camera interface up to 54 Mbytes/s
- True random number generator
- CRC-Berechnungseinheit
- 96-Bit-eindeutige ID
- RTC: subsecond accuracy, hardware calendar
- All packages are ECOPACK2 compliant
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