| MODELL P/N | SERIE | ANZAHL DER LABORE/KLINIKEN | GESCHWINDIGKEITSSTUFE | ANZAHL DER LOGIKELEMENTE / ZELLEN | RAM-BITS INSGESAMT | ANZAHL DER E/A | SPANNUNG - VERSORGUNG | BEFESTIGUNGSTYP | BETRIEBSTEMPERATUR | VERPACKUNG / KASSE | LIEFERANT GERÄTEPAKET |
|---|---|---|---|---|---|---|---|---|---|---|---|
| XC5VSX95T-2FF1136C | Virtex-5 SX | 7,00 | -2,00 | 94 208 | 8 994 816 | 640 | 0,95 V - 1,05 V | Oberflächenmontage | 0 °C ~ +85 °C (C) | 1136-FBGA / FCBGA | 1136-FCBGA (≈ 35 × 35 mm) |
XC5VSX95T-2FF1136C
Hersteller: Xilinx
Logische Zellen: 98,304
Logische Schnitte: 15,360
Eingebettetes RAM (eRAM): 3,072 Kb
Paket: FF1136 (Flip-Chip BGA)
Betriebstemperatur: Handelsüblich (0°C bis +85°C)
Spezifikationen
Die XC5VSX95T-2FF1136C is a mid-to-high density FPGA from the Virtex-5 SXT family (Xilinx, now AMD), built on the reliable 65nm process and optimized for designs that are heavy on DSP computation with dependable high-speed serial transceivers.
Quick specs engineers usually pull up first:
- ~94,208 logic cells (with 14,720 adaptive logic modules / slices) — good fabric space for multi-channel DSP pipelines, video processing blocks, FFTs, FIR/IIR filters, or other signal-processing intensive logic
- 16 RocketIO GTX transceivers — these support multi-gigabit serial links reliably, typically up to ~6.5 Gbps in practical applications (strong fit for 10Gb Ethernet, PCIe Gen1/2, Serial RapidIO, or custom high-speed data paths)
- 640 user I/Os — plenty of flexible pins for external DDR2/3 memory, fast ADCs/DACs, or system-level interfaces
- Embedded block RAM around 8.8 Mbit (plus distributed RAM for smaller, low-latency buffers and FIFOs)
- ~488 DSP48E slices — second-gen 25×18 multipliers with 48-bit accumulators, built for high-throughput fixed- or floating-point math, filters, transforms, and heavy arithmetic workloads
- Paket: 1136-pin FF (flip-chip BGA, ~35 × 35 mm), commercial temperature range (0°C to +85°C junction)
- -2 speed grade — offers excellent timing performance and solid closure margins while managing power more efficiently than the fastest -3 bins in many DSP/SerDes use cases
The SXT series is DSP + transceiver centric — it prioritizes those DSP48E slices and GTX ports over embedded processors (no PowerPC; that’s FXT domain) or maximum plain logic density (more LX/LXT territory).
