{"id":6703,"date":"2025-11-18T20:34:25","date_gmt":"2025-11-18T12:34:25","guid":{"rendered":"https:\/\/www.lxbchip.com\/?post_type=product&#038;p=6703"},"modified":"2026-02-05T16:50:46","modified_gmt":"2026-02-05T08:50:46","slug":"xc5vfx130t-1ff1738i","status":"publish","type":"product","link":"https:\/\/www.lxbchip.com\/vi\/products\/xc5vfx130t-1ff1738i\/","title":{"rendered":"XC5VFX130T-1FF1738I"},"content":{"rendered":"<table id=\"table_1\" class=\"scroll display nowrap data-t data-t wpDataTable wpDataTableID-8 dataTable\" data-described-by=\"table_1_desc\" data-wpdatatable_id=\"8\" aria-describedby=\"table_1_info\">\n<thead>\n<tr>\n<th class=\"wdtheader sort expand column-modelpn sorting\" tabindex=\"0\" colspan=\"1\" rowspan=\"1\" data-class=\"expand\" aria-controls=\"table_1\" aria-label=\" M\u1eabu P\/N ch\u01b0a x\u00e1c \u0111\u1ecbnh\">M\u00c3 S\u1ea2N PH\u1ea8M<\/th>\n<th class=\"wdtheader sort column-series sorting\" tabindex=\"0\" colspan=\"1\" rowspan=\"1\" aria-controls=\"table_1\" aria-label=\" Seriesundefined\">B\u1ed8 PHIM<\/th>\n<th class=\"wdtheader sort numdata float column-numberoflabsclbs sorting\" tabindex=\"0\" colspan=\"1\" rowspan=\"1\" aria-controls=\"table_1\" aria-label=\" S\u1ed1 l\u01b0\u1ee3ng LABs\/CLBsundefined\">S\u1ed0 L\u01af\u1ee2NG PH\u00d2NG TH\u00cd NGHI\u1ec6M\/CLBS<\/th>\n<th class=\"wdtheader sort numdata float column-speedgrade sorting\" tabindex=\"0\" colspan=\"1\" rowspan=\"1\" aria-controls=\"table_1\" aria-label=\" T\u1ed1c \u0111\u1ed9 Gradeundefined\">\u0110\u1ed8 B\u1ec0N THEO T\u1ed0C \u0110\u1ed8<\/th>\n<th class=\"wdtheader sort column-numberoflogicelementscells sorting\" tabindex=\"0\" colspan=\"1\" rowspan=\"1\" aria-controls=\"table_1\" aria-label=\" S\u1ed1 l\u01b0\u1ee3ng c\u00e1c ph\u1ea7n t\u1eed logic \/ \u00f4 kh\u00f4ng x\u00e1c \u0111\u1ecbnh\">S\u1ed0 L\u01af\u1ee2NG PH\u1ea6N T\u1eec L\u1ed0I \/ T\u1ebe B\u00c0O<\/th>\n<th class=\"wdtheader sort column-totalrambits sorting\" tabindex=\"0\" colspan=\"1\" rowspan=\"1\" aria-controls=\"table_1\" aria-label=\" T\u1ed5ng s\u1ed1 bit RAM ch\u01b0a \u0111\u01b0\u1ee3c \u0111\u1ecbnh ngh\u0129a\">T\u1ed5ng s\u1ed1 bit RAM<\/th>\n<th class=\"wdtheader sort numdata integer column-numberofio sorting sorting_asc\" tabindex=\"0\" colspan=\"1\" rowspan=\"1\" aria-controls=\"table_1\" aria-label=\" S\u1ed1 l\u01b0\u1ee3ng I\/O kh\u00f4ng x\u00e1c \u0111\u1ecbnh\" aria-sort=\"ascending\">S\u1ed0 L\u01af\u1ee2NG I\/O<\/th>\n<th class=\"wdtheader sort column-voltagesupply sorting\" tabindex=\"0\" colspan=\"1\" rowspan=\"1\" aria-controls=\"table_1\" aria-label=\" \u0110i\u1ec7n \u00e1p - Ngu\u1ed3n cung c\u1ea5p ch\u01b0a x\u00e1c \u0111\u1ecbnh\">\u0110i\u1ec7n \u00e1p \u2013 Ngu\u1ed3n c\u1ea5p<\/th>\n<th class=\"wdtheader sort column-mountingtype sorting\" tabindex=\"0\" colspan=\"1\" rowspan=\"1\" aria-controls=\"table_1\" aria-label=\" Lo\u1ea1i l\u1eafp \u0111\u1eb7t ch\u01b0a x\u00e1c \u0111\u1ecbnh\">Lo\u1ea1i l\u1eafp \u0111\u1eb7t<\/th>\n<th class=\"wdtheader sort column-operatingtemperature sorting\" tabindex=\"0\" colspan=\"1\" rowspan=\"1\" aria-controls=\"table_1\" aria-label=\" Nhi\u1ec7t \u0111\u1ed9 ho\u1ea1t \u0111\u1ed9ng: Ch\u01b0a x\u00e1c \u0111\u1ecbnh\">NHI\u1ec6T \u0110\u1ed8 HO\u1ea0T \u0110\u1ed8NG<\/th>\n<th class=\"wdtheader sort column-packagecase sorting\" tabindex=\"0\" colspan=\"1\" rowspan=\"1\" aria-controls=\"table_1\" aria-label=\" G\u00f3i \/ V\u1ecf h\u1ed9p\">G\u00d3I \/ H\u1ed8P<\/th>\n<th class=\"wdtheader sort column-supplierdevicepackage sorting\" tabindex=\"0\" colspan=\"1\" rowspan=\"1\" aria-controls=\"table_1\" aria-label=\" G\u00f3i thi\u1ebft b\u1ecb nh\u00e0 cung c\u1ea5p (kh\u00f4ng x\u00e1c \u0111\u1ecbnh)\">G\u00d3I THI\u1ebeT B\u1eca C\u1ee6A NH\u00c0 CUNG C\u1ea4P<\/th>\n<\/tr>\n<\/thead>\n<tbody>\n<tr class=\"odd\">\n<td class=\"expand column-modelpn\">XC5VFX130T-1FF1738I<\/td>\n<td class=\"column-series\">Virtex-5 FXT<\/td>\n<td class=\"numdata float column-numberoflabsclbs\">10.240,00<\/td>\n<td class=\"numdata float column-speedgrade\">-1,00<\/td>\n<td class=\"column-numberoflogicelementscells\">131072<\/td>\n<td class=\"column-totalrambits\">10985472<\/td>\n<td class=\"numdata integer column-numberofio sorting_1\">840<\/td>\n<td class=\"column-voltagesupply\">0,95 V\u20131,05 V<\/td>\n<td class=\"column-mountingtype\">L\u1eafp \u0111\u1eb7t b\u1ec1 m\u1eb7t<\/td>\n<td class=\"column-operatingtemperature\">-40 \u00b0C ~ +100 \u00b0C<\/td>\n<td class=\"column-packagecase\">1738-FBGA, FCBGA<\/td>\n<td class=\"column-supplierdevicepackage\">1738-FCPBGA (42,5 \u00d7 42,5 mm)<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p data-start=\"157\" data-end=\"206\"><strong><span style=\"color: #000080;\">XC5VFX130T-1FF1738I \u2013 FPGA Xilinx Virtex-5 FXT<\/span><\/strong><\/p>\n<p data-start=\"208\" data-end=\"617\">The <strong data-start=\"212\" data-end=\"235\">XC5VFX130T-1FF1738I<\/strong> l\u00e0 m\u1ed9t FPGA c\u00f3 dung l\u01b0\u1ee3ng l\u1edbn thu\u1ed9c d\u00f2ng <strong data-start=\"269\" data-end=\"299\">D\u00f2ng s\u1ea3n ph\u1ea9m Xilinx Virtex-5 FXT<\/strong>, \u0111\u01b0\u1ee3c thi\u1ebft k\u1ebf d\u00e0nh cho c\u00e1c h\u1ec7 th\u1ed1ng y\u00eau c\u1ea7u <strong data-start=\"335\" data-end=\"414\">x\u1eed l\u00fd nh\u00fang, giao di\u1ec7n n\u1ed1i ti\u1ebfp t\u1ed1c \u0111\u1ed9 cao v\u00e0 c\u1ea5u tr\u00fac logic quy m\u00f4 l\u1edbn<\/strong> trong c\u00f9ng m\u1ed9t thi\u1ebft b\u1ecb. T\u1ea1i <strong data-start=\"442\" data-end=\"457\">LXB B\u00e1n d\u1eabn<\/strong>, linh ki\u1ec7n n\u00e0y th\u01b0\u1eddng \u0111\u01b0\u1ee3c cung c\u1ea5p cho c\u00e1c n\u1ec1n t\u1ea3ng c\u00f4ng nghi\u1ec7p v\u00e0 vi\u1ec5n th\u00f4ng, n\u01a1i coi tr\u1ecdng s\u1ef1 ho\u00e0n thi\u1ec7n v\u1ec1 ki\u1ebfn tr\u00fac, \u0111\u1ed9 ch\u00ednh x\u00e1c v\u1ec1 th\u1eddi gian v\u00e0 kh\u1ea3 n\u0103ng cung \u1ee9ng l\u00e2u d\u00e0i.<\/p>\n<p data-start=\"619\" data-end=\"662\"><strong><span style=\"color: #000080;\">T\u00e0i nguy\u00ean logic v\u00e0 x\u1eed l\u00fd nh\u00fang<\/span><\/strong><\/p>\n<p data-start=\"663\" data-end=\"1058\">M\u1eabu XC5VFX130T cung c\u1ea5p kho\u1ea3ng <strong data-start=\"701\" data-end=\"721\">130.000 \u00f4 logic<\/strong>, cung c\u1ea5p \u0111\u1ee7 kh\u1ea3 n\u0103ng x\u1eed l\u00fd cho c\u00e1c \u0111\u01b0\u1eddng d\u1eabn d\u1eef li\u1ec7u ph\u1ee9c t\u1ea1p, x\u1eed l\u00fd d\u1eef li\u1ec7u \u0111a k\u00eanh v\u00e0 kh\u1ea3 n\u0103ng t\u0103ng t\u1ed1c ph\u1ea7n c\u1ee9ng t\u00f9y ch\u1ec9nh. M\u1ed9t \u0111\u1eb7c \u0111i\u1ec3m n\u1ed5i b\u1eadt c\u1ee7a d\u00f2ng s\u1ea3n ph\u1ea9m FXT l\u00e0 vi\u1ec7c t\u00edch h\u1ee3p <strong data-start=\"901\" data-end=\"933\">hai b\u1ed9 x\u1eed l\u00fd PowerPC\u00ae 440<\/strong>, cho ph\u00e9p c\u00e1c nh\u00e0 thi\u1ebft k\u1ebf tri\u1ec3n khai logic \u0111i\u1ec1u khi\u1ec3n, x\u1eed l\u00fd giao th\u1ee9c v\u00e0 qu\u1ea3n l\u00fd h\u1ec7 th\u1ed1ng th\u1eddi gian th\u1ef1c ngay b\u00ean trong FPGA.<\/p>\n<p data-start=\"1060\" data-end=\"1268\">The <strong data-start=\"1064\" data-end=\"1082\">-1 c\u1ea5p \u0111\u1ed9 t\u1ed1c \u0111\u1ed9<\/strong> nh\u1ea5n m\u1ea1nh v\u00e0o hi\u1ec7u su\u1ea5t \u0111\u1ed3ng b\u1ed9 \u1ed5n \u0111\u1ecbnh v\u00e0 \u0111\u01b0\u1ee3c x\u00e1c \u0111\u1ecbnh r\u00f5 r\u00e0ng, khi\u1ebfn n\u00f3 ph\u00f9 h\u1ee3p v\u1edbi c\u00e1c thi\u1ebft k\u1ebf m\u00e0 \u0111\u1ed9 tin c\u1eady v\u00e0 h\u00e0nh vi x\u00e1c \u0111\u1ecbnh \u0111\u01b0\u1ee3c coi tr\u1ecdng h\u01a1n t\u1ea7n s\u1ed1 \u0111\u1ed3ng h\u1ed3 t\u1ed1i \u0111a.<\/p>\n<p data-start=\"1270\" data-end=\"1305\"><strong><span style=\"color: #000080;\">Truy\u1ec1n th\u00f4ng n\u1ed1i ti\u1ebfp t\u1ed1c \u0111\u1ed9 cao<\/span><\/strong><\/p>\n<p data-start=\"1306\" data-end=\"1639\">Thi\u1ebft b\u1ecb n\u00e0y t\u00edch h\u1ee3p <strong data-start=\"1329\" data-end=\"1359\">B\u1ed9 thu ph\u00e1t RocketIO\u2122 GTX<\/strong>, h\u1ed7 tr\u1ee3 c\u00e1c ti\u00eau chu\u1ea9n truy\u1ec1n d\u1eabn n\u1ed1i ti\u1ebfp t\u1ed1c \u0111\u1ed9 cao nh\u01b0 PCI Express, Serial RapidIO, bo m\u1ea1ch n\u1ec1n Gigabit Ethernet v\u00e0 c\u00e1c k\u1ebft n\u1ed1i \u0111i\u1ec3m-\u0111i\u1ec3m \u0111\u1ed9c quy\u1ec1n. Nh\u1edd t\u00edch h\u1ee3p c\u00e1c giao di\u1ec7n n\u1ed1i ti\u1ebfp tr\u1ef1c ti\u1ebfp tr\u00ean chip, c\u00e1c nh\u00e0 thi\u1ebft k\u1ebf h\u1ec7 th\u1ed1ng c\u00f3 th\u1ec3 gi\u1ea3m thi\u1ec3u s\u1ed1 l\u01b0\u1ee3ng linh ki\u1ec7n b\u00ean ngo\u00e0i v\u00e0 \u0111\u01a1n gi\u1ea3n h\u00f3a vi\u1ec7c qu\u1ea3n l\u00fd t\u00ednh to\u00e0n v\u1eb9n t\u00edn hi\u1ec7u.<\/p>\n<p data-start=\"1641\" data-end=\"1677\"><strong><span style=\"color: #000080;\">Thi\u1ebft k\u1ebf b\u1ed9 nh\u1edb tr\u00ean chip v\u00e0 h\u1ec7 th\u1ed1ng<\/span><\/strong><\/p>\n<p data-start=\"1678\" data-end=\"1930\">M\u1ed9t l\u01b0\u1ee3ng \u0111\u00e1ng k\u1ec3 <strong data-start=\"1702\" data-end=\"1715\">B\u1ed9 nh\u1edb RAM kh\u1ed1i<\/strong> c\u00f3 th\u1ec3 \u0111\u01b0\u1ee3c s\u1eed d\u1ee5ng cho b\u1ed9 \u0111\u1ec7m, h\u00e0ng \u0111\u1ee3i g\u00f3i tin v\u00e0 b\u1ed9 nh\u1edb c\u1ee5c b\u1ed9 c\u1ee7a c\u00e1c b\u1ed9 x\u1eed l\u00fd nh\u00fang. \u0110i\u1ec1u n\u00e0y gi\u00fap gi\u1ea3m thi\u1ec3u vi\u1ec7c truy c\u1eadp b\u1ed9 nh\u1edb ngo\u00e0i, c\u1ea3i thi\u1ec7n kh\u1ea3 n\u0103ng ki\u1ec3m so\u00e1t \u0111\u1ed9 tr\u1ec5 v\u00e0 \u0111\u1ea3m b\u1ea3o hi\u1ec7u su\u1ea5t \u1ed5n \u0111\u1ecbnh trong c\u00e1c h\u1ec7 th\u1ed1ng th\u1eddi gian th\u1ef1c.<\/p>\n<p data-start=\"1932\" data-end=\"2117\">N\u1ec1n t\u1ea3ng Virtex-5 FXT \u0111\u01b0\u1ee3c h\u1ed7 tr\u1ee3 b\u1edfi chu\u1ed7i c\u00f4ng c\u1ee5 Xilinx \u0111\u00e3 \u0111\u01b0\u1ee3c ho\u00e0n thi\u1ec7n v\u00e0 m\u1ed9t lo\u1ea1t c\u00e1c l\u00f5i IP \u0111\u00e3 \u0111\u01b0\u1ee3c ki\u1ec3m ch\u1ee9ng, \u0111i\u1ec1u n\u00e0y v\u1eabn mang l\u1ea1i gi\u00e1 tr\u1ecb cho c\u00e1c s\u1ea3n ph\u1ea9m c\u00f3 v\u00f2ng \u0111\u1eddi d\u00e0i v\u00e0 c\u00e1c d\u1ef1 \u00e1n t\u1eadp trung v\u00e0o b\u1ea3o tr\u00ec.<\/p>\n<p data-start=\"2119\" data-end=\"2163\"><strong><span style=\"color: #000080;\">Lo\u1ea1i d\u00e0nh cho \u0111\u00f3ng g\u00f3i v\u00e0 c\u00f4ng nghi\u1ec7p<\/span><\/strong><\/p>\n<p data-start=\"2164\" data-end=\"2543\">The <strong data-start=\"2168\" data-end=\"2203\">G\u00f3i BGA l\u1eadt chip 1738 ch\u00e2n<\/strong> cung c\u1ea5p s\u1ed1 ch\u00e2n k\u1ebft n\u1ed1i r\u1ea5t cao, cho ph\u00e9p ph\u00e2n b\u1ed5 I\/O linh ho\u1ea1t v\u00e0 h\u1ed7 tr\u1ee3 c\u00e1c thi\u1ebft k\u1ebf bo m\u1ea1ch c\u00f3 m\u1eadt \u0111\u1ed9 giao di\u1ec7n cao.<br data-start=\"2315\" data-end=\"2318\" \/>The <strong data-start=\"2322\" data-end=\"2358\">lo\u1ea1i ch\u1ecbu nhi\u1ec7t c\u00f4ng nghi\u1ec7p (I)<\/strong> \u0111\u1ea3m b\u1ea3o ho\u1ea1t \u0111\u1ed9ng \u1ed5n \u0111\u1ecbnh trong d\u1ea3i nhi\u1ec7t \u0111\u1ed9 r\u1ed9ng, gi\u00fap thi\u1ebft b\u1ecb n\u00e0y ph\u00f9 h\u1ee3p cho t\u1ef1 \u0111\u1ed9ng h\u00f3a c\u00f4ng nghi\u1ec7p, thi\u1ebft b\u1ecb truy\u1ec1n th\u00f4ng ngo\u00e0i tr\u1eddi v\u00e0 c\u00e1c m\u00f4i tr\u01b0\u1eddng kh\u1eafc nghi\u1ec7t kh\u00e1c.<\/p>\n<p data-start=\"2545\" data-end=\"2569\"><strong><span style=\"color: #000080;\">\u1ee8ng d\u1ee5ng \u0111i\u1ec3n h\u00ecnh<\/span><\/strong><\/p>\n<p data-start=\"2570\" data-end=\"2614\">M\u1eabu XC5VFX130T-1FF1738I th\u01b0\u1eddng \u0111\u01b0\u1ee3c s\u1eed d\u1ee5ng trong:<\/p>\n<ul data-start=\"2615\" data-end=\"2884\">\n<li data-start=\"2615\" data-end=\"2667\">\n<p data-start=\"2617\" data-end=\"2667\">H\u1ea1 t\u1ea7ng vi\u1ec5n th\u00f4ng v\u00e0 m\u1ea1ng<\/p>\n<\/li>\n<li data-start=\"2668\" data-end=\"2734\">\n<p data-start=\"2670\" data-end=\"2734\">N\u1ec1n t\u1ea3ng x\u1eed l\u00fd nh\u00fang v\u1edbi thi\u1ebft k\u1ebf t\u00edch h\u1ee3p ph\u1ea7n c\u1ee9ng\u2013ph\u1ea7n m\u1ec1m<\/p>\n<\/li>\n<li data-start=\"2735\" data-end=\"2780\">\n<p data-start=\"2737\" data-end=\"2780\">H\u1ec7 th\u1ed1ng \u0111i\u1ec1u khi\u1ec3n v\u00e0 t\u1ef1 \u0111\u1ed9ng h\u00f3a c\u00f4ng nghi\u1ec7p<\/p>\n<\/li>\n<li data-start=\"2781\" data-end=\"2844\">\n<p data-start=\"2783\" data-end=\"2844\">Thi\u1ebft b\u1ecb thu th\u1eadp d\u1eef li\u1ec7u v\u00e0 x\u1eed l\u00fd t\u00edn hi\u1ec7u t\u1ed1c \u0111\u1ed9 cao<\/p>\n<\/li>\n<li data-start=\"2845\" data-end=\"2884\">\n<p data-start=\"2847\" data-end=\"2884\">H\u1ed7 tr\u1ee3 h\u1ec7 th\u1ed1ng l\u00e2u \u0111\u1eddi v\u00e0 h\u1ec7 th\u1ed1ng k\u1ebf th\u1eeba<\/p>\n<\/li>\n<\/ul>","protected":false},"excerpt":{"rendered":"<p><strong>Nh\u00e0 s\u1ea3n xu\u1ea5t:<\/strong> Xilinx <strong>T\u1ebf b\u00e0o logic:<\/strong> 130,560 <strong>C\u00e1c l\u00e1t c\u1eaft logic:<\/strong> 20,480 <strong>B\u1ed9 nh\u1edb RAM t\u00edch h\u1ee3p (eRAM):<\/strong> 6.048 Kb (336 kh\u1ed1i RAM \u00d7 18 Kb) <strong>G\u00f3i:<\/strong> FF1738 (BGA l\u1eadt chip) <strong>Nhi\u1ec7t \u0111\u1ed9 ho\u1ea1t \u0111\u1ed9ng:<\/strong> C\u00f4ng nghi\u1ec7p (-40\u00b0C \u0111\u1ebfn +100\u00b0C)<\/p>","protected":false},"featured_media":6149,"template":"","meta":{"_acf_changed":false},"product_brand":[],"product_cat":[21],"product_tag":[],"class_list":["post-6703","product","type-product","status-publish","has-post-thumbnail","product_cat-xilinx","first","instock","shipping-taxable","product-type-simple"],"acf":[],"aioseo_notices":[],"_links":{"self":[{"href":"https:\/\/www.lxbchip.com\/vi\/wp-json\/wp\/v2\/product\/6703","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.lxbchip.com\/vi\/wp-json\/wp\/v2\/product"}],"about":[{"href":"https:\/\/www.lxbchip.com\/vi\/wp-json\/wp\/v2\/types\/product"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.lxbchip.com\/vi\/wp-json\/wp\/v2\/media\/6149"}],"wp:attachment":[{"href":"https:\/\/www.lxbchip.com\/vi\/wp-json\/wp\/v2\/media?parent=6703"}],"wp:term":[{"taxonomy":"product_brand","embeddable":true,"href":"https:\/\/www.lxbchip.com\/vi\/wp-json\/wp\/v2\/product_brand?post=6703"},{"taxonomy":"product_cat","embeddable":true,"href":"https:\/\/www.lxbchip.com\/vi\/wp-json\/wp\/v2\/product_cat?post=6703"},{"taxonomy":"product_tag","embeddable":true,"href":"https:\/\/www.lxbchip.com\/vi\/wp-json\/wp\/v2\/product_tag?post=6703"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}