{"id":12786,"date":"2026-06-24T12:47:20","date_gmt":"2026-06-24T04:47:20","guid":{"rendered":"https:\/\/www.lxbchip.com\/?p=12786"},"modified":"2026-06-22T02:48:01","modified_gmt":"2026-06-21T18:48:01","slug":"xc7a35t-2csg325i-xilinx-artix-7-fpga-stock-update-2026-tiered-pricing-pin-compatible-alternative-solutions","status":"publish","type":"post","link":"https:\/\/www.lxbchip.com\/vi\/xc7a35t-2csg325i-xilinx-artix-7-fpga-stock-update-2026-tiered-pricing-pin-compatible-alternative-solutions\/","title":{"rendered":"XC7A35T-2CSG325I | C\u1eadp nh\u1eadt t\u00ecnh h\u00ecnh t\u1ed3n kho FPGA Xilinx Artix-7 n\u0103m 2026, ch\u00ednh s\u00e1ch gi\u00e1 theo c\u1ea5p \u0111\u1ed9 v\u00e0 c\u00e1c gi\u1ea3i ph\u00e1p thay th\u1ebf t\u01b0\u01a1ng th\u00edch v\u1ec1 ch\u00e2n c\u1eafm"},"content":{"rendered":"<div>\n<h2>Gi\u1edbi thi\u1ec7u<\/h2>\n<\/div>\n<div>\n<div>XC7A35T-2CSG325I l\u00e0 s\u1ea3n ph\u1ea9m ch\u1ee7 l\u1ef1c c\u00f3 hi\u1ec7u qu\u1ea3 chi ph\u00ed cao trong d\u00f2ng FPGA AMD Xilinx Artix-7 28nm, v\u1edbi 35.000 \u00f4 logic, v\u1ecf \u0111\u00f3ng g\u00f3i nh\u1ecf g\u1ecdn CSBGA-325, c\u1ea5p nhi\u1ec7t \u0111\u1ed9 c\u00f4ng nghi\u1ec7p (-40\u2103~100\u2103 TJ), b\u1ed9 thu ph\u00e1t GTP t\u1ed1c \u0111\u1ed9 cao t\u00edch h\u1ee3p, c\u00f9ng ngu\u1ed3n t\u00e0i nguy\u00ean d\u1ed3i d\u00e0o t\u1eeb c\u00e1c kh\u1ed1i DSP v\u00e0 Block RAM. S\u1ea3n ph\u1ea9m n\u00e0y \u0111\u01b0\u1ee3c \u1ee9ng d\u1ee5ng r\u1ed9ng r\u00e3i trong c\u00e1c h\u1ec7 th\u1ed1ng PLC c\u00f4ng nghi\u1ec7p, h\u1ec7 th\u1ed1ng ph\u00e1t hi\u1ec7n h\u00ecnh \u1ea3nh m\u00e1y, c\u1ed5ng k\u1ebft n\u1ed1i kh\u00f4ng d\u00e2y, thi\u1ebft b\u1ecb ki\u1ec3m tra y t\u1ebf v\u00e0 c\u00e1c bo m\u1ea1ch x\u1eed l\u00fd t\u00edn hi\u1ec7u nh\u00fang gi\u00e1 r\u1ebb.<\/p>\n<div><\/div>\n<p>AMD ch\u00ednh th\u1ee9c gia h\u1ea1n h\u1ed7 tr\u1ee3 s\u1ea3n xu\u1ea5t \u0111\u1ea7y \u0111\u1ee7 cho t\u1ea5t c\u1ea3 c\u00e1c FPGA d\u00f2ng 7 Series \u0111\u1ebfn n\u0103m 2035, nh\u01b0ng do c\u00f4ng su\u1ea5t s\u1ea3n xu\u1ea5t t\u1ea5m wafer 28nm c\u00f3 h\u1ea1n n\u00ean \u0111\u01b0\u1ee3c \u01b0u ti\u00ean d\u00e0nh cho c\u00e1c SoC AI Versal, d\u1eabn \u0111\u1ebfn t\u00ecnh tr\u1ea1ng thi\u1ebfu h\u1ee5t nghi\u00eam tr\u1ecdng v\u1ec1 ngu\u1ed3n cung \u0111\u1ed1i v\u1edbi c\u00e1c m\u1eabu Artix-7 t\u1ea7m trung. Th\u1eddi gian giao h\u00e0ng qua c\u00e1c k\u00eanh ph\u00e2n ph\u1ed1i \u1ee7y quy\u1ec1n to\u00e0n c\u1ea7u c\u1ee7a XC7A35T-2CSG325I k\u00e9o d\u00e0i t\u1eeb 22\u201330 tu\u1ea7n, gi\u00e1 tr\u00ean th\u1ecb tr\u01b0\u1eddng giao ngay t\u0103ng v\u1ecdt t\u1eeb 30% \u0111\u1ebfn 60% so v\u1edbi gi\u00e1 ni\u00eam y\u1ebft c\u1ee7a nh\u00e0 m\u00e1y. LXBCHIP s\u1edf h\u1eefu l\u01b0\u1ee3ng h\u00e0ng t\u1ed3n kho giao ngay kh\u1ed5ng l\u1ed3 c\u1ee7a XC7A35T-2CSG325I v\u00e0 \u0111\u1ea7y \u0111\u1ee7 c\u00e1c bi\u1ebfn th\u1ec3 c\u1ee7a d\u00f2ng Artix-7 \u0111\u1ec3 gi\u1ea3i quy\u1ebft t\u00ecnh tr\u1ea1ng thi\u1ebfu h\u1ee5t nguy\u00ean v\u1eadt li\u1ec7u do th\u1eddi gian giao h\u00e0ng k\u00e9o d\u00e0i cho c\u00e1c d\u1ef1 \u00e1n k\u1ef9 thu\u1eadt v\u00e0 s\u1ea3n xu\u1ea5t h\u00e0ng lo\u1ea1t.<\/p><\/div>\n<\/div>\n<div>\n<h2>1. Ngu\u1ed3n cung th\u1ecb tr\u01b0\u1eddng v\u00e0 l\u1ee3i th\u1ebf v\u1ec1 t\u1ed3n kho c\u1ee7a LXBCHIP<\/h2>\n<\/div>\n<div>\n<ul>\n<li>T\u00ecnh h\u00ecnh cung \u1ee9ng t\u1eeb nh\u00e0 m\u00e1y: L\u01b0\u1ee3ng wafer ph\u00e2n b\u1ed5 cho Artix-7 gi\u1ea3m 38% so v\u1edbi c\u00f9ng k\u1ef3 n\u0103m ngo\u00e1i; c\u00e1c \u0111\u01a1n h\u00e0ng m\u1edbi ch\u1ec9 c\u00f3 th\u1ec3 \u0111\u01b0\u1ee3c l\u00ean l\u1ecbch \u0111\u1ebfn cu\u1ed1i n\u0103m 2026, c\u00e1c nh\u00e0 s\u1ea3n xu\u1ea5t quy m\u00f4 nh\u1ecf v\u00e0 v\u1eeba kh\u00f4ng th\u1ec3 \u0111\u1ea3m b\u1ea3o \u0111\u01b0\u1ee3c h\u1ea1n ng\u1ea1ch \u1ed5n \u0111\u1ecbnh.<\/li>\n<li>V\u1ea5n \u0111\u1ec1 nan gi\u1ea3i tr\u00ean th\u1ecb tr\u01b0\u1eddng: C\u00e1c l\u00f4 h\u00e0ng giao ngay ph\u00e2n t\u00e1n c\u00f3 m\u00e3 ng\u00e0y s\u1ea3n xu\u1ea5t kh\u00f4ng \u0111\u1ed3ng nh\u1ea5t; nhi\u1ec1u k\u00eanh ph\u00e2n ph\u1ed1i song song cung c\u1ea5p c\u00e1c FPGA \u0111\u00e3 qua t\u00e2n trang v\u00e0 s\u1eeda ch\u1eefa l\u1ea1i, ti\u1ec1m \u1ea9n r\u1ee7i ro v\u1ec1 t\u00ednh \u1ed5n \u0111\u1ecbnh c\u1ee7a bitstream.<\/li>\n<li>H\u00e0ng t\u1ed3n kho c\u1ee7a ch\u00fang t\u00f4i: H\u01a1n 3.600 chi\u1ebfc XC7A35T-2CSG325I nguy\u00ean b\u1ea3n, ho\u00e0n to\u00e0n m\u1edbi, \u0111\u01b0\u1ee3c \u0111\u00f3ng g\u00f3i trong khay ni\u00eam phong c\u1ee7a nh\u00e0 m\u00e1y, c\u00f3 th\u1ec3 truy xu\u1ea5t ngu\u1ed3n g\u1ed1c \u0111\u1ea7y \u0111\u1ee7 qua s\u1ed1 s\u00ea-ri, c\u00f3 s\u1eb5n c\u1ea3 hai lo\u1ea1i nhi\u1ec7t \u0111\u1ed9 c\u00f4ng nghi\u1ec7p v\u00e0 th\u01b0\u01a1ng m\u1ea1i. Ch\u00fang t\u00f4i cung c\u1ea5p d\u1ecbch v\u1ee5 \u0111\u1eb7t h\u00e0ng t\u1ed3n kho c\u1ed1 \u0111\u1ecbnh d\u00e0i h\u1ea1n cho c\u00e1c kh\u00e1ch h\u00e0ng c\u00f3 nhu c\u1ea7u s\u1ea3n xu\u1ea5t h\u00e0ng lo\u1ea1t h\u00e0ng n\u0103m.<\/li>\n<li>H\u1ed7 tr\u1ee3 giao h\u00e0ng: G\u1eedi m\u1eabu th\u1eed nghi\u1ec7m trong ng\u00e0y; \u0111\u1ed1i v\u1edbi \u0111\u01a1n h\u00e0ng s\u1ed1 l\u01b0\u1ee3ng l\u1edbn, h\u1ed7 tr\u1ee3 chia l\u00f4 giao h\u00e0ng; \u0111\u1ed9i ng\u0169 k\u1ef9 thu\u1eadt cung c\u1ea5p t\u01b0 v\u1ea5n mi\u1ec5n ph\u00ed v\u1ec1 vi\u1ec7c thay th\u1ebf c\u00e1c linh ki\u1ec7n t\u01b0\u01a1ng th\u00edch v\u1ec1 ch\u00e2n c\u1eafm.<\/li>\n<\/ul>\n<\/div>\n<div>\n<h2>2. B\u00e1o gi\u00e1 theo c\u1ea5p \u0111\u1ed9 theo th\u1eddi gian th\u1ef1c (USD, bao b\u00ec khay CSG325 m\u1edbi nguy\u00ean b\u1ea3n)<\/h2>\n<\/div>\n<div>\n<ul>\n<li>1\u201324 chi\u1ebfc: $116,8 \/ chi\u1ebfc<\/li>\n<li>25\u2013199 chi\u1ebfc: $98,5 \/ chi\u1ebfc<\/li>\n<li>200\u2013999 chi\u1ebfc: $82.3 \/ chi\u1ebfc<\/li>\n<li>\u22651000 chi\u1ebfc: \u0110\u00e0m ph\u00e1n gi\u00e1 \u01b0u \u0111\u00e3i \u0111\u1ed9c quy\u1ec1n<\/li>\n<\/ul>\n<\/div>\n<div>\n<h2>3. C\u00e1c m\u1eabu FPGA thay th\u1ebf t\u01b0\u01a1ng th\u00edch<\/h2>\n<\/div>\n<div>\n<h3>Thay th\u1ebf tr\u1ef1c ti\u1ebfp ch\u00e2n v\u1edbi ch\u00e2n (kh\u00f4ng c\u1ea7n s\u1eeda \u0111\u1ed5i PCB, t\u01b0\u01a1ng th\u00edch v\u1edbi IP v\u00e0 bitstream)<\/h3>\n<\/div>\n<div>\n<ol>\n<li>XC7A35T-1CSG325C: Lo\u1ea1i t\u1ed1c \u0111\u1ed9 th\u1ea5p h\u01a1n, d\u1ea3i nhi\u1ec7t \u0111\u1ed9 th\u01b0\u01a1ng m\u1ea1i, gi\u00fap gi\u1ea3m chi ph\u00ed cho thi\u1ebft b\u1ecb c\u00f4ng nghi\u1ec7p trong nh\u00e0<\/li>\n<li>XC7A50T-2CSG325I: M\u1edf r\u1ed9ng l\u00ean 50.000 \u00f4 logic, b\u1ed5 sung t\u00e0i nguy\u00ean DSP v\u00e0 RAM, b\u1ea3n n\u00e2ng c\u1ea5p d\u00e0nh cho x\u1eed l\u00fd t\u00edn hi\u1ec7u \u0111a k\u00eanh ph\u1ee9c t\u1ea1p<\/li>\n<\/ol>\n<\/div>\n<div>\n<h3>C\u00e1c ph\u01b0\u01a1ng \u00e1n n\u00e2ng c\u1ea5p hi\u1ec7u su\u1ea5t cao (c\u1ea7n \u0111i\u1ec1u ch\u1ec9nh b\u1ed1 tr\u00ed m\u1ea1ch in)<\/h3>\n<\/div>\n<div>\n<ol>\n<li>XC7K325T-2FFG676I: FPGA Kintex-7 ph\u00e2n kh\u00fac trung-cao c\u1ea5p, c\u00f3 t\u1ed1c \u0111\u1ed9 b\u1ed9 thu ph\u00e1t GTX cao h\u01a1n, d\u00e0nh cho c\u00e1c thi\u1ebft b\u1ecb truy\u1ec1n th\u00f4ng v\u00e0 x\u1eed l\u00fd h\u00ecnh \u1ea3nh c\u00f3 b\u0103ng th\u00f4ng cao<\/li>\n<\/ol>\n<\/div>\n<div>\n<h2>4. C\u00e1c t\u00ecnh hu\u1ed1ng \u1ee9ng d\u1ee5ng \u0111i\u1ec3n h\u00ecnh<\/h2>\n<\/div>\n<div>\n<div>B\u1ea3ng \u0111i\u1ec1u khi\u1ec3n PLC trong t\u1ef1 \u0111\u1ed9ng h\u00f3a c\u00f4ng nghi\u1ec7p, m\u00f4-\u0111un thu th\u1eadp h\u00ecnh \u1ea3nh cho h\u1ec7 th\u1ed1ng th\u1ecb gi\u00e1c m\u00e1y, thi\u1ebft b\u1ecb ch\u1ea9n \u0111o\u00e1n y t\u1ebf c\u1ea7m tay, x\u1eed l\u00fd t\u00edn hi\u1ec7u cho tr\u1ea1m g\u1ed1c nh\u1ecf, b\u1ed9 ghi d\u1eef li\u1ec7u nh\u00fang t\u1ed1c \u0111\u1ed9 cao<\/div>\n<\/div>\n<div>\n<h2>K\u1ebft lu\u1eadn<\/h2>\n<\/div>\n<div>\n<div>Vi\u1ec7c AMD k\u00e9o d\u00e0i v\u00f2ng \u0111\u1eddi s\u1ea3n ph\u1ea9m \u0111\u1ebfn n\u0103m 2035 gi\u00fap lo\u1ea1i b\u1ecf r\u1ee7i ro ph\u1ea3i thi\u1ebft k\u1ebf l\u1ea1i do s\u1ea3n ph\u1ea9m h\u1ebft v\u00f2ng \u0111\u1eddi (EOL) \u0111\u1ed1i v\u1edbi c\u00e1c d\u1ef1 \u00e1n s\u1eed d\u1ee5ng d\u00f2ng Xilinx 7 Series; tuy nhi\u00ean, t\u00ecnh tr\u1ea1ng thi\u1ebfu h\u1ee5t c\u00f4ng su\u1ea5t nh\u00e0 m\u00e1y s\u1ebd khi\u1ebfn th\u1eddi gian giao h\u00e0ng c\u1ee7a Artix-7 v\u1eabn \u1edf m\u1ee9c cao cho \u0111\u1ebfn cu\u1ed1i n\u0103m. C\u00e1c k\u1ef9 s\u01b0 n\u00ean mua h\u00e0ng t\u1ed3n kho s\u1eb5n c\u00f3 tr\u01b0\u1edbc ho\u1eb7c l\u1ef1a ch\u1ecdn c\u00e1c m\u1eabu thay th\u1ebf do LXBCHIP \u0111\u1ec1 xu\u1ea5t. H\u00e3y li\u00ean h\u1ec7 v\u1edbi \u0111\u1ed9i ng\u0169 c\u1ee7a ch\u00fang t\u00f4i \u0111\u1ec3 ki\u1ec3m tra t\u00ecnh tr\u1ea1ng t\u1ed3n kho theo th\u1eddi gian th\u1ef1c, t\u1ea3i xu\u1ed1ng b\u1ea3ng d\u1eef li\u1ec7u ch\u00ednh th\u1ee9c v\u00e0 nh\u1eadn b\u00e1o gi\u00e1 cho \u0111\u01a1n h\u00e0ng s\u1ed1 l\u01b0\u1ee3ng l\u1edbn.<\/div>\n<\/div>","protected":false},"excerpt":{"rendered":"<p>Gi\u1edbi thi\u1ec7u: XC7A35T-2CSG325I l\u00e0 s\u1ea3n ph\u1ea9m ch\u1ee7 l\u1ef1c v\u1edbi hi\u1ec7u su\u1ea5t chi ph\u00ed cao trong d\u00f2ng FPGA AMD Xilinx Artix-7 28nm, s\u1edf h\u1eefu 35.000 \u00f4 logic v\u00e0 \u0111\u01b0\u1ee3c thi\u1ebft k\u1ebf theo chu\u1ea9n CSBGA-325 nh\u1ecf g\u1ecdn<\/p>","protected":false},"author":1,"featured_media":12783,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[1],"tags":[],"class_list":["post-12786","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-news"],"acf":[],"aioseo_notices":[],"_links":{"self":[{"href":"https:\/\/www.lxbchip.com\/vi\/wp-json\/wp\/v2\/posts\/12786","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.lxbchip.com\/vi\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.lxbchip.com\/vi\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.lxbchip.com\/vi\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/www.lxbchip.com\/vi\/wp-json\/wp\/v2\/comments?post=12786"}],"version-history":[{"count":0,"href":"https:\/\/www.lxbchip.com\/vi\/wp-json\/wp\/v2\/posts\/12786\/revisions"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.lxbchip.com\/vi\/wp-json\/wp\/v2\/media\/12783"}],"wp:attachment":[{"href":"https:\/\/www.lxbchip.com\/vi\/wp-json\/wp\/v2\/media?parent=12786"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.lxbchip.com\/vi\/wp-json\/wp\/v2\/categories?post=12786"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.lxbchip.com\/vi\/wp-json\/wp\/v2\/tags?post=12786"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}