{"id":7964,"date":"2025-12-09T19:53:32","date_gmt":"2025-12-09T11:53:32","guid":{"rendered":"https:\/\/www.lxbchip.com\/?page_id=7964"},"modified":"2026-04-09T01:23:46","modified_gmt":"2026-04-08T17:23:46","slug":"altera","status":"publish","type":"page","link":"https:\/\/www.lxbchip.com\/ko\/manufacturers\/altera\/","title":{"rendered":"Altera"},"content":{"rendered":"
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\uc54c\ud14c\ub77c FPGA \uc194\ub8e8\uc158<\/h2>\n\t\t\t\t\t\t\t<\/div>\n\t\t\t\n\t\t\t\t\t\t\t
LXB Semicon\uc740 \uc911\uae09 \ubc0f \uace0\uae09 \uc778\ud154 Altera FPGA \uc81c\ud488 \uc720\ud1b5\uc744 \uc804\ubb38\uc73c\ub85c \ud558\uba70, \uc548\uc815\uc801\uc778 \uc18c\uc2f1 \ucc44\ub110, \ube60\ub978 \uae00\ub85c\ubc8c \ubc30\uc1a1, \uc0b0\uc5c5\uc6a9 \ubc0f \uace0\uc131\ub2a5 \uc560\ud50c\ub9ac\ucf00\uc774\uc158\uc744 \uc704\ud55c \uc804\ubb38\uc801\uc778 \uc9c0\uc6d0\uacfc \ud568\uaed8 \uacf5\uc7a5 \ubc00\ubd09\ub41c \uc624\ub9ac\uc9c0\ub110 \ubd80\ud488\uc744 \uacf5\uae09\ud569\ub2c8\ub2e4.<\/div>\n\t\t\t\n\t\t\t\n\t\t<\/div>\n\t\t\n\t\t<\/div><\/div><\/div><\/div>\n

 <\/p>\n\n\n\n\n\n\n\n\n\n\n\n
Mfr \ubd80\ud488<\/td>\n\ub370\uc774\ud130\uc2dc\ud2b8<\/td>\n\uc81c\uc870\uc5c5\uccb4<\/td>\nFPGA \uc81c\ud488\uad70<\/td>\n\ub17c\ub9ac \uc694\uc18c(LE)<\/td>\n\uc784\ubca0\ub514\ub4dc \uba54\ubaa8\ub9ac<\/td>\nDSP \/ \uba40\ud2f0\ud50c\ub77c\uc774\uc5b4<\/td>\n\ucd5c\ub300 I\/O \uc218<\/td>\n\ucf54\uc5b4 \uc804\uc555<\/td>\nI\/O \uc804\uc555<\/td>\n\uc791\ub3d9 \uc628\ub3c4<\/td>\n\ud328\ud0a4\uc9c0<\/td>\n\ud504\ub85c\uc138\uc2a4 \ub178\ub4dc<\/td>\n\uc77c\ubc18\uc801\uc778 \ucd5c\ub300 \uc8fc\ud30c\uc218<\/td>\n\ub300\uc0c1 \uc560\ud50c\ub9ac\ucf00\uc774\uc158<\/td>\nRoHS<\/td>\n<\/tr>\n
<\/td>\n<\/td>\n<\/td>\n<\/td>\n<\/td>\n<\/td>\n<\/td>\n<\/td>\n<\/td>\n<\/td>\n<\/td>\n<\/td>\n<\/td>\n<\/td>\n<\/td>\n<\/td>\n<\/tr>\n
EP3C16Q240C8N<\/td>\n<\/td>\nALTERA<\/td>\nCyclone\u00ae III<\/td>\n15408<\/td>\n516 Kbits<\/td>\n56 \u00d7 18\u00d718<\/td>\n160<\/td>\n1.15-1.25 V<\/td>\n\ucd5c\ub300 3.3V<\/td>\n0\u00b0C ~ +85\u00b0C<\/td>\nPQFP-240<\/td>\n65nm<\/td>\n~315MHz<\/td>\n\uc784\ubca0\ub514\ub4dc \uc81c\uc5b4, \uc0b0\uc5c5\uc6a9, \ud1b5\uc2e0<\/td>\n\uc608<\/td>\n<\/tr>\n
EP4CE15F23I7N<\/td>\n<\/td>\nALTERA<\/td>\nCyclone\u00ae IV E<\/td>\n15408<\/td>\n504 Kbits<\/td>\n56 \u00d7 18\u00d718<\/td>\n\ucd5c\ub300 343<\/td>\n1.15-1.25 V<\/td>\n\ucd5c\ub300 3.3V<\/td>\n-40\u00b0C ~ +100\u00b0C<\/td>\nFBGA<\/td>\n60nm<\/td>\n~200MHz<\/td>\n\uc0b0\uc5c5 \uc81c\uc5b4, HMI, \uc790\ub3d9\ud654<\/td>\n\uc608<\/td>\n<\/tr>\n
EP4CE22F17I7N<\/td>\n<\/td>\nALTERA<\/td>\nCyclone\u00ae IV E<\/td>\n22320<\/td>\n594 Kbits<\/td>\n66 \u00d7 18\u00d718<\/td>\n\ucd5c\ub300 153<\/td>\n1.15-1.25 V<\/td>\n\ucd5c\ub300 3.3V<\/td>\n-40\u00b0C ~ +100\u00b0C<\/td>\nFBGA<\/td>\n60nm<\/td>\n~200MHz<\/td>\n\uace0\ubc00\ub3c4 \ub85c\uc9c1, \uc0b0\uc5c5\uc6a9 \uc2dc\uc2a4\ud15c<\/td>\n\uc608<\/td>\n<\/tr>\n
EP4CE10F17C8N<\/td>\n<\/td>\nALTERA<\/td>\nCyclone\u00ae IV E<\/td>\n10320<\/td>\n~414Kbits<\/td>\n46 \u00d7 18\u00d718<\/td>\n\ud328\ud0a4\uc9c0 \uc885\uc18d\uc801<\/td>\n1.15-1.25 V<\/td>\n\ucd5c\ub300 3.3V<\/td>\n-40\u00b0C ~ +85\u00b0C<\/td>\nFBGA<\/td>\n60nm<\/td>\n~200MHz<\/td>\n\ube44\uc6a9 \ucd5c\uc801\ud654\ub41c \uc784\ubca0\ub514\ub4dc \uc124\uacc4<\/td>\n\uc608<\/td>\n<\/tr>\n
EP4CE10E22C8N<\/td>\n<\/td>\nALTERA<\/td>\nCyclone\u00ae IV E<\/td>\n10320<\/td>\n~414Kbits<\/td>\n46 \u00d7 18\u00d718<\/td>\n\ud328\ud0a4\uc9c0 \uc885\uc18d\uc801<\/td>\n1.15-1.25 V<\/td>\n\ucd5c\ub300 3.3V<\/td>\n-40\u00b0C ~ +85\u00b0C<\/td>\nFBGA<\/td>\n60nm<\/td>\n~200MHz<\/td>\n\uc784\ubca0\ub514\ub4dc \uc81c\uc5b4, \uc790\ub3d9\ud654<\/td>\n\uc608<\/td>\n<\/tr>\n
5CEBA2F17C8N<\/td>\n<\/td>\nALTERA<\/td>\nCyclone\u00ae IV E<\/td>\n~25,000(\ud328\ubc00\ub9ac \ud074\ub798\uc2a4)<\/td>\n\uac00\uc871 \ubd80\uc591 \uac00\uc871<\/td>\n\uac00\uc871 \ubd80\uc591 \uac00\uc871<\/td>\n\ud328\ud0a4\uc9c0 \uc885\uc18d\uc801<\/td>\n1.15-1.25 V<\/td>\n\ucd5c\ub300 3.3V<\/td>\n-40\u00b0C ~ +85\u00b0C<\/td>\nFBGA<\/td>\n60nm<\/td>\n~200MHz<\/td>\n\uc0b0\uc5c5\uc6a9 \ub85c\uc9c1, \ud1b5\uc2e0 \uc81c\uc5b4<\/td>\n\uc608<\/td>\n<\/tr>\n
EP2C5T144C8N<\/td>\n<\/td>\nALTERA<\/td>\nCyclone\u00ae II<\/td>\n~5,120<\/td>\n~119Kbits<\/td>\n\uc81c\ud55c\uc801<\/td>\n\ucd5c\ub300 89<\/td>\n~1.2 V<\/td>\n\ucd5c\ub300 3.3V<\/td>\n0\u00b0C ~ +85\u00b0C<\/td>\nTQFP-144<\/td>\n90nm<\/td>\n~250MHz<\/td>\n\ub808\uac70\uc2dc \uc2dc\uc2a4\ud15c, \uac04\ub2e8\ud55c \ub85c\uc9c1 \uc81c\uc5b4<\/td>\n\uc608<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<\/div>","protected":false},"excerpt":{"rendered":"

  Mfr Part Datasheet Manufacturer FPGA Family Logic Elements (LEs) Embedded Memory DSP \/ Multipliers Max I\/O Count Core Voltage<\/p>","protected":false},"author":1,"featured_media":0,"parent":388,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"_acf_changed":false,"footnotes":""},"class_list":["post-7964","page","type-page","status-publish","hentry"],"acf":[],"aioseo_notices":[],"_links":{"self":[{"href":"https:\/\/www.lxbchip.com\/ko\/wp-json\/wp\/v2\/pages\/7964","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.lxbchip.com\/ko\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/www.lxbchip.com\/ko\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/www.lxbchip.com\/ko\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/www.lxbchip.com\/ko\/wp-json\/wp\/v2\/comments?post=7964"}],"version-history":[{"count":0,"href":"https:\/\/www.lxbchip.com\/ko\/wp-json\/wp\/v2\/pages\/7964\/revisions"}],"up":[{"embeddable":true,"href":"https:\/\/www.lxbchip.com\/ko\/wp-json\/wp\/v2\/pages\/388"}],"wp:attachment":[{"href":"https:\/\/www.lxbchip.com\/ko\/wp-json\/wp\/v2\/media?parent=7964"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}