{"id":6662,"date":"2025-11-18T16:33:30","date_gmt":"2025-11-18T08:33:30","guid":{"rendered":"https:\/\/www.lxbchip.com\/?post_type=product&#038;p=6662"},"modified":"2026-02-02T19:39:50","modified_gmt":"2026-02-02T11:39:50","slug":"xc4vlx100-10ff1148c","status":"publish","type":"product","link":"https:\/\/www.lxbchip.com\/ar\/products\/xc4vlx100-10ff1148c\/","title":{"rendered":"xc4vlx100-10ff1148c"},"content":{"rendered":"<table id=\"table_1\" class=\"scroll display nowrap data-t data-t wpDataTable wpDataTableID-8 dataTable\" data-described-by=\"table_1_desc\" data-wpdatatable_id=\"8\" aria-describedby=\"table_1_info\">\n<thead>\n<tr>\n<th class=\"wdtheader sort expand column-modelpn sorting\" tabindex=\"0\" colspan=\"1\" rowspan=\"1\" data-class=\"expand\" aria-controls=\"table_1\" aria-label=\" \u0627\u0644\u0637\u0631\u0627\u0632 P\/N\u063a\u064a\u0631 \u0645\u062d\u062f\u062f\">\u0627\u0644\u0637\u0631\u0627\u0632 P\/N<\/th>\n<th class=\"wdtheader sort column-series sorting\" tabindex=\"0\" colspan=\"1\" rowspan=\"1\" aria-controls=\"table_1\" aria-label=\" \u0627\u0644\u0633\u0644\u0633\u0644\u0629\u0645\u062d\u062f\u062f\">\u0627\u0644\u0633\u0644\u0633\u0644\u0629<\/th>\n<th class=\"wdtheader sort numdata float column-numberoflabsclbs sorting\" tabindex=\"0\" colspan=\"1\" rowspan=\"1\" aria-controls=\"table_1\" aria-label=\" \u0639\u062f\u062f \u0648\u062d\u062f\u0627\u062a LABs\/CLB\u0645\u062d\u062f\u062f\u0629\">\u0639\u062f\u062f \u0627\u0644\u0645\u0639\u0627\u0645\u0644\/\u0627\u0644\u0645\u062e\u062a\u0628\u0631\u0627\u062a<\/th>\n<th class=\"wdtheader sort numdata float column-speedgrade sorting\" tabindex=\"0\" colspan=\"1\" rowspan=\"1\" aria-controls=\"table_1\" aria-label=\" \u062f\u0631\u062c\u0629 \u0627\u0644\u0633\u0631\u0639\u0629\u0645\u062d\u062f\u062f\u0629\">\u062f\u0631\u062c\u0629 \u0627\u0644\u0633\u0631\u0639\u0629<\/th>\n<th class=\"wdtheader sort column-numberoflogicelementscells sorting\" tabindex=\"0\" colspan=\"1\" rowspan=\"1\" aria-controls=\"table_1\" aria-label=\" \u0639\u062f\u062f \u0627\u0644\u0639\u0646\u0627\u0635\u0631 \u0627\u0644\u0645\u0646\u0637\u0642\u064a\u0629\/\u0627\u0644\u062e\u0644\u0627\u064a\u0627\u0627\u0644\u0645\u062d\u062f\u062f\u0629\">\u0639\u062f\u062f \u0627\u0644\u0639\u0646\u0627\u0635\u0631\/\u0627\u0644\u062e\u0644\u0627\u064a\u0627 \u0627\u0644\u0645\u0646\u0637\u0642\u064a\u0629<\/th>\n<th class=\"wdtheader sort column-totalrambits sorting\" tabindex=\"0\" colspan=\"1\" rowspan=\"1\" aria-controls=\"table_1\" aria-label=\" \u0625\u062c\u0645\u0627\u0644\u064a \u0630\u0627\u0643\u0631\u0629 \u0627\u0644\u0648\u0635\u0648\u0644 \u0627\u0644\u0639\u0634\u0648\u0627\u0626\u064a (RAM)\">\u0625\u062c\u0645\u0627\u0644\u064a \u0628\u062a\u0627\u062a \u0630\u0627\u0643\u0631\u0629 \u0627\u0644\u0648\u0635\u0648\u0644 \u0627\u0644\u0639\u0634\u0648\u0627\u0626\u064a (RAM)<\/th>\n<th class=\"wdtheader sort numdata integer column-numberofio sorting sorting_asc\" tabindex=\"0\" colspan=\"1\" rowspan=\"1\" aria-controls=\"table_1\" aria-label=\" \u0639\u062f\u062f \u0627\u0644\u0625\u062f\u062e\u0627\u0644\/\u0627\u0644\u0625\u062e\u0631\u0627\u062c \u063a\u064a\u0631 \u0645\u062d\u062f\u062f\" aria-sort=\"ascending\">\u0639\u062f\u062f \u0627\u0644\u0625\u062f\u062e\u0627\u0644\/\u0627\u0644\u0625\u062e\u0631\u0627\u062c<\/th>\n<th class=\"wdtheader sort column-voltagesupply sorting\" tabindex=\"0\" colspan=\"1\" rowspan=\"1\" aria-controls=\"table_1\" aria-label=\" \u0627\u0644\u0641\u0648\u0644\u062a\u064a\u0629 - \u0627\u0644\u0625\u0645\u062f\u0627\u062f - \u063a\u064a\u0631 \u0645\u062d\u062f\u062f\">\u0627\u0644\u062c\u0647\u062f - \u0627\u0644\u0625\u0645\u062f\u0627\u062f<\/th>\n<th class=\"wdtheader sort column-mountingtype sorting\" tabindex=\"0\" colspan=\"1\" rowspan=\"1\" aria-controls=\"table_1\" aria-label=\" \u0646\u0648\u0639 \u0627\u0644\u062a\u0631\u0643\u064a\u0628\u063a\u064a\u0631 \u0645\u062d\u062f\u062f\">\u0646\u0648\u0639 \u0627\u0644\u062a\u0631\u0643\u064a\u0628<\/th>\n<th class=\"wdtheader sort column-operatingtemperature sorting\" tabindex=\"0\" colspan=\"1\" rowspan=\"1\" aria-controls=\"table_1\" aria-label=\" \u062f\u0631\u062c\u0629 \u062d\u0631\u0627\u0631\u0629 \u0627\u0644\u062a\u0634\u063a\u064a\u0644\u063a\u064a\u0631 \u0645\u062d\u062f\u062f\u0629\">\u062f\u0631\u062c\u0629 \u062d\u0631\u0627\u0631\u0629 \u0627\u0644\u062a\u0634\u063a\u064a\u0644<\/th>\n<th class=\"wdtheader sort column-packagecase sorting\" tabindex=\"0\" colspan=\"1\" rowspan=\"1\" aria-controls=\"table_1\" aria-label=\" \u0627\u0644\u062d\u0632\u0645\u0629\/\u0627\u0644\u062d\u0627\u0644\u0629\u0645\u062d\u062f\u062f\u0629\">\u0627\u0644\u0639\u0628\u0648\u0629 \/ \u0627\u0644\u0639\u0644\u0628\u0629<\/th>\n<th class=\"wdtheader sort column-supplierdevicepackage sorting\" tabindex=\"0\" colspan=\"1\" rowspan=\"1\" aria-controls=\"table_1\" aria-label=\" \u062d\u0632\u0645\u0629 \u0627\u0644\u062c\u0647\u0627\u0632 \u0627\u0644\u0645\u0648\u0631\u062f\u062d\u0632\u0645\u0629 \u062c\u0647\u0627\u0632 \u0627\u0644\u0645\u0648\u0631\u062f\u0645\u062d\u062f\u062f\">\u062d\u0632\u0645\u0629 \u062c\u0647\u0627\u0632 \u0627\u0644\u0645\u0648\u0631\u062f<\/th>\n<\/tr>\n<\/thead>\n<tbody>\n<tr class=\"odd\">\n<td class=\"expand column-modelpn\">xc4vlx100-10ff1148c<\/td>\n<td class=\"column-series\">Virtex-4 LX<\/td>\n<td class=\"numdata float column-numberoflabsclbs\">11.520,00<\/td>\n<td class=\"numdata float column-speedgrade\">-10,00<\/td>\n<td class=\"column-numberoflogicelementscells\">99840<\/td>\n<td class=\"column-totalrambits\">4478976<\/td>\n<td class=\"numdata integer column-numberofio sorting_1\">768<\/td>\n<td class=\"column-voltagesupply\">1.14 \u0641\u0648\u0644\u062a ~ 1.26 \u0641\u0648\u0644\u062a<\/td>\n<td class=\"column-mountingtype\">\u0627\u0644\u062a\u0631\u0643\u064a\u0628 \u0639\u0644\u0649 \u0627\u0644\u0633\u0637\u062d<\/td>\n<td class=\"column-operatingtemperature\">0 \u062f\u0631\u062c\u0629 \u0645\u0626\u0648\u064a\u0629 ~ +85 \u062f\u0631\u062c\u0629 \u0645\u0626\u0648\u064a\u0629 (\u062a\u062c\u0627\u0631\u064a)<\/td>\n<td class=\"column-packagecase\">1148-BBGA (FCCBGA)<\/td>\n<td class=\"column-supplierdevicepackage\">1148-FCBGA<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p data-path-to-node=\"3\"><span style=\"color: #000080;\"><b data-path-to-node=\"3\" data-index-in-node=\"0\">XC4VLX100-10FF1148C: High-Density Logic Consolidation for Commercial Computing Platforms<\/b><\/span><\/p>\n<p data-path-to-node=\"4\">\u0625\u0646 <b data-path-to-node=\"4\" data-index-in-node=\"4\">xc4vlx100-10ff1148c<\/b> is a high-capacity FPGA within Xilinx\u2019s legendary Virtex\u00ae-4 LX family, specifically engineered for logic-intensive commercial applications. Utilizing the revolutionary <b data-path-to-node=\"4\" data-index-in-node=\"192\">90 \u0646\u0627\u0646\u0648\u0645\u062a\u0631 ASMBL\u2122 (\u0643\u062a\u0644\u0629 \u0648\u062d\u062f\u0627\u062a \u0627\u0644\u0633\u064a\u0644\u064a\u0643\u0648\u0646 \u0627\u0644\u0645\u062a\u0642\u062f\u0645\u0629)<\/b> architecture, this device provides a massive <b data-path-to-node=\"4\" data-index-in-node=\"282\">110,592 Logic Cell<\/b> fabric. It is the definitive choice for architects who need to consolidate complex system-level functions\u2014such as multiple soft-core processors, high-bandwidth memory controllers, and extensive custom RTL\u2014into a single, high-reliability silicon footprint.<\/p>\n<p data-path-to-node=\"5\">Operating at a <b data-path-to-node=\"5\" data-index-in-node=\"15\">Commercial-grade (0\u00b0C to +85\u00b0C)<\/b> temperature range with a <b data-path-to-node=\"5\" data-index-in-node=\"72\">-10 \u062f\u0631\u062c\u0627\u062a \u0627\u0644\u0633\u0631\u0639\u0629<\/b>, it offers a balanced solution for high-end digital signal processing and massive parallel data routing.<\/p>\n<p data-path-to-node=\"6\"><span style=\"color: #000080;\"><b data-path-to-node=\"6\" data-index-in-node=\"0\">\u0623\u0628\u0631\u0632 \u0627\u0644\u0645\u0644\u0627\u0645\u062d \u0627\u0644\u0647\u0646\u062f\u0633\u064a\u0629 \u0627\u0644\u0623\u0633\u0627\u0633\u064a\u0629<\/b><\/span><\/p>\n<ul data-path-to-node=\"7\">\n<li>\n<p data-path-to-node=\"7,0,0\"><b data-path-to-node=\"7,0,0\" data-index-in-node=\"0\">Architectural Efficiency:<\/b> The ASMBL architecture allows for a highly uniform distribution of logic, memory, and DSP columns. This reduces routing congestion, a critical advantage when designing high-utilization systems that exceed 80% logic occupancy.<\/p>\n<\/li>\n<li>\n<p data-path-to-node=\"7,1,0\"><b data-path-to-node=\"7,1,0\" data-index-in-node=\"0\">Rich Memory Hierarchy:<\/b> \u0627\u0644\u0645\u064a\u0632\u0627\u062a <b data-path-to-node=\"7,1,0\" data-index-in-node=\"32\">4,320 \u0643\u064a\u0644\u0648\u0628\u0627\u064a\u062a \u0645\u0646 \u0643\u062a\u0644\u0629 \u0630\u0627\u0643\u0631\u0629 \u0627\u0644\u0648\u0635\u0648\u0644 \u0627\u0644\u0639\u0634\u0648\u0627\u0626\u064a (BRAM)<\/b>. This dual-port memory resources are essential for implementing deep data buffers, localized caching, and high-speed FIFO structures required in streaming video or networking applications.<\/p>\n<\/li>\n<li>\n<p data-path-to-node=\"7,2,0\"><b data-path-to-node=\"7,2,0\" data-index-in-node=\"0\">Massive I\/O Connectivity:<\/b> \u064a\u0642\u0639 \u0641\u064a <b data-path-to-node=\"7,2,0\" data-index-in-node=\"40\">FF1148 Flip-Chip BGA<\/b> package, the device breaks out <b data-path-to-node=\"7,2,0\" data-index-in-node=\"92\">768 \u0645\u062f\u062e\u0644\u0627\u062a\/\u0645\u062e\u0631\u062c\u0627\u062a \u0627\u0644\u0645\u0633\u062a\u062e\u062f\u0645 768<\/b>. This allows for the simultaneous management of high-width parallel buses, such as dual-bank DDR2 or QDR-II interfaces, without pin-count bottlenecks.<\/p>\n<\/li>\n<li>\n<p data-path-to-node=\"7,3,0\"><b data-path-to-node=\"7,3,0\" data-index-in-node=\"0\">XtremeDSP\u2122 Performance:<\/b> \u0645\u062f\u0645\u062c \u0645\u0639 <b data-path-to-node=\"7,3,0\" data-index-in-node=\"40\">96 dedicated DSP48 slices<\/b>. These hard-coded arithmetic blocks handle 18&#215;18 bit multiplications and MAC functions at hardware speeds, freeing up standard logic for control plane tasks.<\/p>\n<\/li>\n<li>\n<p data-path-to-node=\"7,4,0\"><b data-path-to-node=\"7,4,0\" data-index-in-node=\"0\">Precision Clocking (DCM):<\/b> Equipped with advanced <b data-path-to-node=\"7,4,0\" data-index-in-node=\"49\">Digital Clock Managers<\/b> for sub-nanosecond skew control and frequency synthesis, ensuring stable synchronization across complex, multi-clock domain designs.<\/p>\n<\/li>\n<\/ul>\n<hr data-path-to-node=\"8\" \/>\n<p data-path-to-node=\"9\"><span style=\"color: #000080;\"><b data-path-to-node=\"9\" data-index-in-node=\"0\">\u0645\u0635\u0641\u0648\u0641\u0629 \u0627\u0644\u0645\u0648\u0627\u0635\u0641\u0627\u062a \u0627\u0644\u0641\u0646\u064a\u0629<\/b><\/span><\/p>\n<table data-path-to-node=\"10\">\n<thead>\n<tr>\n<td><strong>\u0627\u0644\u0645\u064a\u0632\u0629<\/strong><\/td>\n<td><strong>\u0627\u0644\u0645\u0648\u0627\u0635\u0641\u0627\u062a<\/strong><\/td>\n<\/tr>\n<\/thead>\n<tbody>\n<tr>\n<td><span data-path-to-node=\"10,1,0,0\"><b data-path-to-node=\"10,1,0,0\" data-index-in-node=\"0\">\u0627\u0644\u062e\u0644\u0627\u064a\u0627 \u0627\u0644\u0645\u0646\u0637\u0642\u064a\u0629<\/b><\/span><\/td>\n<td><span data-path-to-node=\"10,1,1,0\">110,592<\/span><\/td>\n<\/tr>\n<tr>\n<td><span data-path-to-node=\"10,2,0,0\"><b data-path-to-node=\"10,2,0,0\" data-index-in-node=\"0\">\u0645\u0635\u0641\u0648\u0641\u0629 CLB<\/b><\/span><\/td>\n<td><span data-path-to-node=\"10,2,1,0\">12,480<\/span><\/td>\n<\/tr>\n<tr>\n<td><span data-path-to-node=\"10,3,0,0\"><b data-path-to-node=\"10,3,0,0\" data-index-in-node=\"0\">\u0625\u062c\u0645\u0627\u0644\u064a \u0643\u062a\u0644\u0629 \u0630\u0627\u0643\u0631\u0629 \u0627\u0644\u0648\u0635\u0648\u0644 \u0627\u0644\u0639\u0634\u0648\u0627\u0626\u064a (RAM)<\/b><\/span><\/td>\n<td><span data-path-to-node=\"10,3,1,0\">4,320 \u0643\u064a\u0644\u0648 \u0628\u0627\u064a\u062a<\/span><\/td>\n<\/tr>\n<tr>\n<td><span data-path-to-node=\"10,4,0,0\"><b data-path-to-node=\"10,4,0,0\" data-index-in-node=\"0\">\u0634\u0631\u0627\u0626\u062d DSP48 DSP48<\/b><\/span><\/td>\n<td><span data-path-to-node=\"10,4,1,0\">96<\/span><\/td>\n<\/tr>\n<tr>\n<td><span data-path-to-node=\"10,5,0,0\"><b data-path-to-node=\"10,5,0,0\" data-index-in-node=\"0\">\u0645\u062f\u062e\u0644\u0627\u062a\/\u0645\u062e\u0631\u062c\u0627\u062a \u0627\u0644\u0645\u0633\u062a\u062e\u062f\u0645<\/b><\/span><\/td>\n<td><span data-path-to-node=\"10,5,1,0\">768<\/span><\/td>\n<\/tr>\n<tr>\n<td><span data-path-to-node=\"10,6,0,0\"><b data-path-to-node=\"10,6,0,0\" data-index-in-node=\"0\">\u062f\u0631\u062c\u0629 \u0627\u0644\u0633\u0631\u0639\u0629<\/b><\/span><\/td>\n<td><span data-path-to-node=\"10,6,1,0\">-10 (\u0627\u0644\u0623\u062f\u0627\u0621 \u0627\u0644\u0642\u064a\u0627\u0633\u064a)<\/span><\/td>\n<\/tr>\n<tr>\n<td><span data-path-to-node=\"10,7,0,0\"><b data-path-to-node=\"10,7,0,0\" data-index-in-node=\"0\">\u062f\u0631\u062c\u0629 \u0627\u0644\u062d\u0631\u0627\u0631\u0629<\/b><\/span><\/td>\n<td><span data-path-to-node=\"10,7,1,0\">\u062a\u062c\u0627\u0631\u064a (0 \u062f\u0631\u062c\u0629 \u0645\u0626\u0648\u064a\u0629 \u0625\u0644\u0649 +85 \u062f\u0631\u062c\u0629 \u0645\u0626\u0648\u064a\u0629)<\/span><\/td>\n<\/tr>\n<tr>\n<td><span data-path-to-node=\"10,8,0,0\"><b data-path-to-node=\"10,8,0,0\" data-index-in-node=\"0\">\u0627\u0644\u062d\u0632\u0645\u0629<\/b><\/span><\/td>\n<td><span data-path-to-node=\"10,8,1,0\">FF1148 (Flip-Chip BGA)<\/span><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<hr data-path-to-node=\"11\" \/>\n<p data-path-to-node=\"12\"><span style=\"color: #000080;\"><b data-path-to-node=\"12\" data-index-in-node=\"0\">Hardware Architect\u2019s Perspective: Why Specify the LX100-10C?<\/b><\/span><\/p>\n<p data-path-to-node=\"13\"><b data-path-to-node=\"13\" data-index-in-node=\"0\">1. \u062a\u0648\u0642\u064a\u062a \u0627\u0644\u0625\u063a\u0644\u0627\u0642 \u0627\u0644\u0630\u064a \u064a\u0645\u0643\u0646 \u0627\u0644\u062a\u0646\u0628\u0624 \u0628\u0647<\/b><\/p>\n<p data-path-to-node=\"13\">One of the primary reasons engineers stay with the Virtex-4 LX100 is its predictable routing fabric. Unlike newer, more congested architectures, the LX100 provides consistent timing models that allow for faster design iterations and &#8220;right-the-first-time&#8221; silicon behavior.<\/p>\n<p data-path-to-node=\"14\"><b data-path-to-node=\"14\" data-index-in-node=\"0\">2. \u0633\u0644\u0627\u0645\u0629 \u0627\u0644\u0625\u0634\u0627\u0631\u0629 \u0627\u0644\u0641\u0627\u0626\u0642\u0629<\/b><\/p>\n<p data-path-to-node=\"14\">\u0625\u0646 <b data-path-to-node=\"14\" data-index-in-node=\"33\">FF1148 Flip-Chip package<\/b> is specifically designed to minimize parasitic inductance. With a dense distribution of VCC and GND pins, it suppresses <b data-path-to-node=\"14\" data-index-in-node=\"178\">\u0636\u0648\u0636\u0627\u0621 \u0627\u0644\u062a\u062d\u0648\u064a\u0644 \u0627\u0644\u0645\u062a\u0632\u0627\u0645\u0646 (SSN)<\/b>, ensuring clean signal eyes for high-speed differential pairs (LVDS\/HSTL).<\/p>\n<p data-path-to-node=\"15\"><b data-path-to-node=\"15\" data-index-in-node=\"0\">3. Maturity and Stability<\/b><\/p>\n<p data-path-to-node=\"15\">For commercial products with long lifecycles\u2014such as medical imaging backplanes or high-end broadcasting gear\u2014the LX100-10C offers a proven track record of field reliability and a well-documented toolchain, reducing the risk of unexpected architectural bugs.<\/p>\n<hr data-path-to-node=\"16\" \/>\n<p data-path-to-node=\"17\"><span style=\"color: #000080;\"><b data-path-to-node=\"17\" data-index-in-node=\"0\">Ideal Use Cases<\/b><\/span><\/p>\n<ul data-path-to-node=\"18\">\n<li>\n<p data-path-to-node=\"18,0,0\"><b data-path-to-node=\"18,0,0\" data-index-in-node=\"0\">\u0627\u0644\u0628\u062b:<\/b> Real-time format conversion and professional-grade video switching.<\/p>\n<\/li>\n<li>\n<p data-path-to-node=\"18,1,0\"><b data-path-to-node=\"18,1,0\" data-index-in-node=\"0\">Medical Systems:<\/b> Advanced MRI data acquisition and real-time image reconstruction.<\/p>\n<\/li>\n<li>\n<p data-path-to-node=\"18,2,0\"><b data-path-to-node=\"18,2,0\" data-index-in-node=\"0\">\u0627\u0644\u0627\u062e\u062a\u0628\u0627\u0631 \u0648\u0627\u0644\u0642\u064a\u0627\u0633:<\/b> Logic analyzer front-ends and high-speed pattern generation.<\/p>\n<\/li>\n<li>\n<p data-path-to-node=\"18,3,0\"><b data-path-to-node=\"18,3,0\" data-index-in-node=\"0\">\u0627\u0644\u0627\u062a\u0635\u0627\u0644\u0627\u062a:<\/b> High-speed protocol conversion and localized switching fabrics.<\/p>\n<\/li>\n<\/ul>","protected":false},"excerpt":{"rendered":"<p><strong>\u0627\u0644\u0634\u0631\u0643\u0629 \u0627\u0644\u0645\u0635\u0646\u0639\u0629:<\/strong> \u0632\u064a\u0644\u064a\u0646\u0643\u0633<br \/>\n<strong>\u0627\u0644\u062e\u0644\u0627\u064a\u0627 \u0627\u0644\u0645\u0646\u0637\u0642\u064a\u0629:<\/strong> 110,592<br \/>\n<strong>\u0634\u0631\u0627\u0626\u062d \u0627\u0644\u0645\u0646\u0637\u0642:<\/strong> 49,152 (\u062a\u0642\u0631\u064a\u0628\u0627\u064b)<br \/>\n<strong>\u0630\u0627\u0643\u0631\u0629 \u0627\u0644\u0648\u0635\u0648\u0644 \u0627\u0644\u0639\u0634\u0648\u0627\u0626\u064a \u0627\u0644\u0645\u062f\u0645\u062c\u0629 (eRAM):<\/strong> 4,320 \u0643\u064a\u0644\u0648 \u0628\u0627\u064a\u062a (240 \u00d7 18 \u0643\u064a\u0644\u0648 \u0628\u0627\u064a\u062a \u0645\u0646 \u0630\u0627\u0643\u0631\u0629 \u0627\u0644\u0648\u0635\u0648\u0644 \u0627\u0644\u0639\u0634\u0648\u0627\u0626\u064a \u0627\u0644\u0645\u062c\u0645\u0639\u0629)<br \/>\n<strong>\u0627\u0644\u062d\u0632\u0645\u0629:<\/strong> FF1148 (Fine-Pitch BGA)<br \/>\n<strong>\u062f\u0631\u062c\u0629 \u062d\u0631\u0627\u0631\u0629 \u0627\u0644\u062a\u0634\u063a\u064a\u0644:<\/strong> \u062a\u062c\u0627\u0631\u064a (0 \u062f\u0631\u062c\u0629 \u0645\u0626\u0648\u064a\u0629 \u0625\u0644\u0649 +85 \u062f\u0631\u062c\u0629 \u0645\u0626\u0648\u064a\u0629)<\/p>","protected":false},"featured_media":6090,"template":"","meta":{"_acf_changed":false},"product_brand":[],"product_cat":[21],"product_tag":[],"class_list":["post-6662","product","type-product","status-publish","has-post-thumbnail","product_cat-xilinx","first","instock","shipping-taxable","product-type-simple"],"acf":[],"aioseo_notices":[],"_links":{"self":[{"href":"https:\/\/www.lxbchip.com\/ar\/wp-json\/wp\/v2\/product\/6662","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.lxbchip.com\/ar\/wp-json\/wp\/v2\/product"}],"about":[{"href":"https:\/\/www.lxbchip.com\/ar\/wp-json\/wp\/v2\/types\/product"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.lxbchip.com\/ar\/wp-json\/wp\/v2\/media\/6090"}],"wp:attachment":[{"href":"https:\/\/www.lxbchip.com\/ar\/wp-json\/wp\/v2\/media?parent=6662"}],"wp:term":[{"taxonomy":"product_brand","embeddable":true,"href":"https:\/\/www.lxbchip.com\/ar\/wp-json\/wp\/v2\/product_brand?post=6662"},{"taxonomy":"product_cat","embeddable":true,"href":"https:\/\/www.lxbchip.com\/ar\/wp-json\/wp\/v2\/product_cat?post=6662"},{"taxonomy":"product_tag","embeddable":true,"href":"https:\/\/www.lxbchip.com\/ar\/wp-json\/wp\/v2\/product_tag?post=6662"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}